Special-purpose devices for signal and image processing : an opportunity in VLSI

Based on the systolic array approach, new designs of special-purpose devices for filtering, correlation, convolution, and discrete Fourier transform are proposed and discussed. It is argued that because of high degrees of simplicity, regularity and concurrency inherent to these designs, their VLSI implementation will be cost effective. Introduction LSI technology allows tens of thousands of devices to fit on a single chip; VLSI technology promises an increase of this number by at least one order of magnitude in the next decade. Both the opportunities and challenges presented by VLSI are tremondous. This paper proposes and discusses the use of die systolic array approach in the construction of special-purpose VLSI devices for signal and image processing. These devices are to be attached to a host, which can be a conventional computer or another special-purpose system. Systolic arrays is an architecture first proposed for implementation of matrix operations in VLSI. 1 Typically a systolic array enjoys the following properties: 1. The array can be implemented with only a few types of simple cells. 2. The data and control flow of the array is simple and regular, so that cells can be connected by a network with local and regular interconnections; long distance or irregular communication is not needed. 3. The array uses extensive pipelining and multiprocessing. Typically, several data streams move at constant velocities over fixed paths in the network, and interact where they meet. In this fashion, a large proportion of the processors in the array are kept active, so that the array can sustain a high rate of computation flow. 4. The array makes multiple uses of each input data item. As a result, high computation throughput can be achieved without requiring high bandwidth between the array and the host. VLSI designs based on systolic arrays tend to be simple (a consequence of properties 1 and 2), modular (property 2), and of high performance (properties 3 and 4). Therefore systolic arrays are suitable for VLSI implementation. Examples and further discussions of the attractiveness of systolic arrays can be found in other papers . 2 , 3 ' 4 , 5 In this paper we illustrate the use of systolic arrays in performing several important operations in signal and image processing. Systolic arrays for filtering This section discribes the basic design of a family of systolic arrays for performing filtering. Designs of systolic arrays for convolution, correlation and pattern matching can be obtained similarly, so they will not be discussed separately here. Mathematically the canonical form of the filtering problem can be defined as follows: given the weighting cofficients {wQ, w^ w h } , {r^ r 2 r k ] , the initial values fr-k> y-k + i' y l* ' a n d ^ i n P u t s c Q u c n c e fr-fr x_h + 1 , xQ, x p x j ,